## Model Question Paper of

CS203

## Switching Theory and Logic Design

**THIRD SEMESTER B.TECH DEGREE EXAMINATION DECEMBER 2016**

**CS 203: Switching Theory and Logic Design**

**PART A ( Answer All Questions Each carries 3 Marks )**

1. Perform the following conversions i) FD3.6A to Octal ii) (673.62)8 to decimal iii) (793.75)10 to Hexa decimal

2. What you mean by weighted code?

3. Add the following BCD numbers. 01100111 + 01010011 . 4. What are the universal gates? Why they are called universal gate?

**PART B**

**( Answer any TWO, Each carries 9 Marks )**

5. Simplify the following expresstions using karnaugh map and NAND gate. a) (7 marks) (2 mark)

6. Minimize the following function F(A,B,C,D)= Σm(6,7,8,9) assuming that the condition having both A=1 and B= 1 ( don’t care condition = Σm(12,13,14,15)) can never occur. Realize the digital circuit using i) NAND gate ii) NOR gates

7. Minimize the function F= Σm(4,5,10,11,15,1820,24,26,30,31) + Σm(9,12, 14,16,19,21,25) where Σ are the minters corresponding to don’t care conditions using QuinMcClusky method

**PART C ( Answer All Questions Each Carries 3 Marks )**

8. Explain binary subtractor.

9. show the logic digram of R-S flipflop with four NAND gate

10. what are the differences of flip-flop and Latch?

11. Implement 4:1 multiplexer

**PART D ( Answer any TWO, Each carries 9 Marks )**

13. a) Expand to min terms and max terms b) Use a multiplexer to implement the function (4 marks)

14. a)Implement Full adder circuit using NAND gate only.(5 marks)

**PART E ( Answer any FOUR, Each carries 10 Marks )**

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